Posts Tagged ‘RISC-V’

Background We build a bunch of stuff for RISC-V using the Dart official Docker image, but the RISC-V images can often arrive some time (days) after the more mainstream images[1]. That means that if we merge a Dependabot PR for an updated image it might well be missing RISC-V, causing the Continuous Delivery (CD) pipeline […]


TL;DR RISE did it’s job, and in the past couple of years RISC-V support has found its way into stable releases of key infrastructure software like Debian. So from a software perspective, it’s arguable that RISC-V is now ready for production. Progress has been a little slower on the hardware front, but hardware is… hard; […]


Security researchers at the CISPA Helmholtz Center for Information Security have discovered a vulnerability they’ve called ‘GhostWrite’ that’s caused by a hardware bug in T-Head’s XuanTie C910 and C920 RISC-V CPUs. Vector extensions that are supposed to provide translation of virtual memory addresses to physical addresses don’t work, meaning that an attacker can gain access to the […]


May 2023

01Jun23

Pupdate Towards the end of the month it started staying dry enough to start returning to some of the longer ‘summer’ walks. The end for ‘Trigger’s AirPods’ In a previous post I’d mentioned that I probably should have spent my money on some new AirPods Pro rather than keeping on replacing parts of my old […]


One of my favourite features of Dart is its ability to create executables (aka ahead of time [AOT] binaries)[1]. Creating binaries for the platform you’re running on is very straightforward, just dart compile exe but Dart doesn’t presently support cross compilation for command line binaries, unlike Rust and Go, which have also surged in popularity. […]


This is the blog version of a Twitter conversation with my colleague Graham Chastney. Huawei, and the war on trade POTUS #45 has been pursuing a ‘trade war’ with China, as this appears to be popular with his base, even though it makes stuff more expensive for them and will ultimately harm the US economy. […]


RISC-V[1] is something that I’ve been aware of via the Open Source Hardware Users Group (OSHUG) for a little while, and their most recent meeting was a RISC-V special, with talks on core selection and porting FreeBSD to the platform. Suddenly it seems that RISC-V is all over the news. A sample from the last […]